Embedded systems such as mobile devices are currently ubiquitous. The performance potential of these devices is rapidly improving by incorporating multi-core and GPU technologies, and is rapidly catching up with the workstation platforms. Nevertheless, the heterogeneity of the underlying hardware as well as the low-power constraints severely limit performance portability. In this paper we consider the case of leveraging JIT compilers to provide portable parallelization while hiding the corresponding expensive runtime analysis. We propose a novel lightweight JIT framework that exploits the device idle time and the large storage space generally available on these devices. The framework performs 'incremental' analysis while the processor is idle (such as during charging time), and exploits the storage space to cache intermediate analysis results. Such approach requires reengineering existing complex optimization analysis methods. For this paper, we focus on the traditional loop parallelization analysis, and implement a working prototype into the LLVM framework, integrating a lightweight dynamic profiling method to identify hotspots. Initial results demonstrate the low overhead of our method for parallelizing simple loops on an embedded GPU.
from HAL : Dernières publications http://ift.tt/15liFgJ
from HAL : Dernières publications http://ift.tt/15liFgJ
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